    vs_3_0
    dcl_texcoord5 o5
dcl_texcoord3 o3
dcl_texcoord4 o4
dcl_texcoord o0
dcl_texcoord1 o1
dcl_texcoord2 o2
dcl_position o10
dcl_position v0
    dcl_normal v1
    dcl_texcoord v2
    mul r1.xyz, v1, c13.w
    dp4 r0.z, v0, c6
    dp4 r0.x, v0, c4
    dp4 r0.y, v0, c5
    dp4 r0.w, v0, c7
    dp4 o5.w, r0, c11
    dp4 o5.z, r0, c10
    dp4 o5.y, r0, c9
    dp4 o5.x, r0, c8
    dp3 o3.z, r1, c6
    dp3 o3.y, r1, c5
    dp3 o3.x, r1, c4
    add o4.xyz, -r0, c12
    mad o0.zw, v2.xyxy, c15.xyxy, c15
    mad o0.xy, v2, c14, c14.zwzw
    mad o1.zw, v2.xyxy, c17.xyxy, c17
    mad o1.xy, v2, c16, c16.zwzw
    mad o2.xy, v2, c18, c18.zwzw
    dp4 o10.w, v0, c3
    dp4 o10.z, v0, c2
    dp4 o10.y, v0, c1
    dp4 o10.x, v0, c0

// approximately 22 instruction slots used
 

